Datasheet

Section 8 EXDMA Controller
Rev. 3.00 Mar 17, 2006 page 335 of 926
REJ09B0283-0300
Section 8 EXDMA Controller
This LSI has a built-in four-channel external bus transfer DMA controller (EXDMAC). The
EXDMAC can carry out high-speed data transfer, in place of the CPU, to and from external
devices and external memory with a DACK (DMA transfer notification) facility.
8.1 Features
• Direct specification of 16-Mbyte address space
• Selection of byte or word transfer data length
• Maximum number of transfers: 16M (16,777,215)/infinite (free-running)
• Selection of dual address mode or single address mode
• Selection of cycle steal mode or burst mode as bus mode
• Selection of normal mode or block transfer mode as transfer mode
• Two kinds of transfer requests: external request and auto-request
• An interrupt request can be sent to the CPU at the end of the specified number of transfers.
• Repeat area designation function:
• Operation in parallel with internal bus master:
• Acceptance of a transfer request and the start of transfer processing can be reported to an
external device via the EDRAK pin.
• Module stop mode can be set.
Figure 8.1 shows a block diagram of the EXDMAC.
EDMA260A_010020020400