Datasheet

Rev. 3.00 Mar 17, 2006 page xxxvi of l
Figure 8.23 Example of Single Address Mode (Word Read) Transfer ................................... 376
Figure 8.24 Example of Single Address Mode (Byte Write) Transfer.................................... 377
Figure 8.25 Example of Single Address Mode (Word Write) Transfer .................................. 377
Figure 8.26 Example of Single Address Mode Transfer Activated by EDREQ Pin
Falling Edge......................................................................................................... 378
Figure 8.27 Example of Single Address Mode Transfer Activated by EDREQ Pin
Low Level............................................................................................................ 379
Figure 8.28 Auto Request/Cycle Steal Mode/Normal Transfer Mode
(No Contention/Dual Address Mode).................................................................. 380
Figure 8.29 Auto Request/Cycle Steal Mode/Normal Transfer Mode
(CPU Cycles/Single Address Mode).................................................................... 381
Figure 8.30 Auto Request/Cycle Steal Mode/Normal Transfer Mode
(Contention with Another Channel/Single Address Mode)................................. 381
Figure 8.31 Auto Request/Burst Mode/Normal Transfer Mode
(CPU Cycles/Dual Address Mode/BGUP = 0) .................................................... 382
Figure 8.32 Auto Request/Burst Mode/Normal Transfer Mode
(CPU Cycles/Dual Address Mode/BGUP = 1) .................................................... 382
Figure 8.33 Auto Request/Burst Mode/Normal Transfer Mode
(CPU Cycles/Single Address Mode/BGUP = 1).................................................. 383
Figure 8.34 Auto Request/Burst Mode/Normal Transfer Mode
(Contention with Another Channel/Single Address Mode)................................. 383
Figure 8.35 External Request/Cycle Steal Mode/Normal Transfer Mode
(No Contention/Dual Address Mode/Low Level Sensing).................................. 384
Figure 8.36 External Request/Cycle Steal Mode/Normal Transfer Mode
(CPU Cycles/Single Address Mode/Low Level Sensing).................................... 385
Figure 8.37 External Request/Cycle Steal Mode/Normal Transfer Mode
(No Contention/Single Address Mode/Falling Edge Sensing)............................. 385
Figure 8.38 External Request/Cycle Steal Mode/Normal Transfer Mode Contention
with Another Channel/Dual Address Mode/Low Level Sensing......................... 386
Figure 8.39 External Request/Cycle Steal Mode/Block Transfer Mode
(No Contention/Dual Address Mode/Low Level Sensing/BGUP = 0) ................ 387
Figure 8.40 External Request/Cycle Steal Mode/Block Transfer Mode
(No Contention/Single Address Mode/Falling Edge Sensing/BGUP = 0)........... 388
Figure 8.41 External Request/Cycle Steal Mode/Block Transfer Mode
(CPU Cycles/Single Address Mode/Low Level Sensing/BGUP = 0).................. 389
Figure 8.42 External Request/Cycle Steal Mode/Block Transfer Mode
(CPU Cycles/Dual Address Mode/Low Level Sensing/BGUP = 1) .................... 390
Figure 8.43 External Request/Cycle Steal Mode/Block Transfer Mode
(CPU Cycles/Single Address Mode/Low Level Sensing/BGUP = 1).................. 391
Figure 8.44 External Request/Cycle Steal Mode/Block Transfer Mode
(Contention with Another Channel/Dual Address Mode/Low Level Sensing).... 392