Datasheet

Rev. 3.00 Mar 17, 2006 page xxv of l
13.8.2 Contention between TCNT Write and Increment................................................ 644
13.8.3 Contention between TCOR Write and Compare Match ...................................... 645
13.8.4 Contention between Compare Matches A and B................................................. 646
13.8.5 Switching of Internal Clocks and TCNT Operation............................................. 646
13.8.6 Mode Setting with Cascaded Connection ............................................................ 648
13.8.7 Interrupts in Module Stop Mode.......................................................................... 648
Section 14 Watchdog Timer............................................................................................. 649
14.1 Features............................................................................................................................. 649
14.2 Input/Output Pin................................................................................................................ 650
14.3 Register Descriptions........................................................................................................ 650
14.3.1 Timer Counter (TCNT)........................................................................................ 651
14.3.2 Timer Control/Status Register (TCSR)................................................................ 651
14.3.3 Reset Control/Status Register (RSTCSR)............................................................ 653
14.4 Operation .......................................................................................................................... 654
14.4.1 Watchdog Timer Mode........................................................................................ 654
14.4.2 Interval Timer Mode............................................................................................ 655
14.5 Interrupt Source ................................................................................................................ 656
14.6 Usage Notes ...................................................................................................................... 656
14.6.1 Notes on Register Access..................................................................................... 656
14.6.2 Contention between Timer Counter (TCNT) Write and Increment..................... 658
14.6.3 Changing Value of CKS2 to CKS0...................................................................... 658
14.6.4 Switching between Watchdog Timer Mode and Interval Timer Mode................ 658
14.6.5 Internal Reset in Watchdog Timer Mode............................................................. 659
14.6.6 System Reset by WDTOVF Signal...................................................................... 659
Section 15 Serial Communication Interface (SCI, IrDA)........................................ 661
15.1 Features............................................................................................................................. 661
15.2 Input/Output Pins.............................................................................................................. 664
15.3 Register Descriptions........................................................................................................ 664
15.3.1 Receive Shift Register (RSR) .............................................................................. 665
15.3.2 Receive Data Register (RDR).............................................................................. 665
15.3.3 Transmit Data Register (TDR)............................................................................. 666
15.3.4 Transmit Shift Register (TSR)............................................................................. 666
15.3.5 Serial Mode Register (SMR)................................................................................ 666
15.3.6 Serial Control Register (SCR).............................................................................. 670
15.3.7 Serial Status Register (SSR) ................................................................................ 673
15.3.8 Smart Card Mode Register (SCMR).................................................................... 678
15.3.9 Bit Rate Register (BRR) ...................................................................................... 679
15.3.10 IrDA Control Register (IrCR).............................................................................. 688
15.3.11 Serial Extension Mode Register (SEMR) ............................................................ 689