Datasheet

Section 6 Bus Controller (BSC)
Rev. 3.00 Mar 17, 2006 page 205 of 926
REJ09B0283-0300
T
p
φ
SDRAMφ
RAS
Read
CAS
WE
CKE
PALL ACTV READ NOP
DQMU, DQML
Data bus
Address bus
T
r
T
c1
T
cl1
T
cl2
T
c2
Row address Column address Column address
Precharge-sel
Row address
High
RAS
Write
CAS
WE
CKE
PALL ACTV NOP NOPWRIT
DQMU, DQML
Data bus
High
Figure 6.45 CAS Latency Control Timing (SDWCD = 0, CAS Latency 3)