Datasheet

Section 6 Bus Controller (BSC)
Rev. 3.00 Mar 17, 2006 page 143 of 926
REJ09B0283-0300
Bit Bit Name Initial Value R/W Description
011: 11-bit shift
• When 8-bit access space is designated:
Row address bits A23 to A11 used for
comparison
When 16-bit access space is designated:
Row address bits A23 to A12 used for
comparison
Synchronous DRAM interface
100: 8-bit shift
• When 8-bit access space is designated:
Row address bits A23 to A8 used for
comparison
• When 16-bit access space is designated:
Row address bits A23 to A9 used for
comparison
The precharge-sel is A15 to A9 of the
column address.
101: 9-bit shift
• When 8-bit access space is designated:
Row address bits A23 to A9 used for
comparison
• When 16-bit access space is designated:
Row address bits A23 to A10 used for
comparison
The precharge-sel is A15 to A10 of the
column address.
110: 10-bit shift
• When 8-bit access space is designated:
Row address bits A23 to A10 used for
comparison
• When 16-bit access space is designated:
Row address bits A23 to A11 used for
comparison
The precharge-sel is A15 to A11 of the
column address.