Datasheet

Section 3 MCU Operating Modes
Rev. 3.00 Mar 17, 2006 page 62 of 926
REJ09B0283-0300
3.3.5 Mode 5
The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is enabled.
The program in an external ROM connected to the first half of area 0 is executed.
Ports A to C function as an address bus, ports D and E function as a data bus, and parts of ports F
to H carry bus control signals.
The initial bus mode after a reset is 16 bits, with 16-bit access to all areas. However, if 8-bit access
is designated for any area by the bus controller, the bus mode switches to 8 bits.
In the flash memory version, user program mode is entered by setting 1 to the SWE bit of
FLMCR1.
3.3.6 Mode 6
The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is enabled.
The program in an external ROM connected to the first half of area 0 is executed.
Ports A to C function as an address bus, ports D and E function as a data bus, and parts of ports F
to H carry bus control signals.
The initial bus mode after a reset is 8 bits, with 8-bit access to all areas. However, if 16-bit access
is designated for any area by the bus controller, the bus mode switches to 16 bits and port E
functions as a data bus.
In the flash memory version, user program mode is entered by setting 1 to the SWE bit of
FLMCR1.
3.3.7 Mode 7
The CPU can access a 16-Mbyte address space in advanced mode. The on-chip ROM is enabled,
and the chip starts up in single-chip mode. External addresses cannot be used in single-chip mode.
The initial mode after a reset is single-chip mode, with all I/O ports available for use as
input/output ports. However, the mode can be switched to externally expanded mode by setting 1
to the EXPE bit of SYSCR and then the external address space is enabled. When externally
expanded mode is selected, all areas are initially designated as 16-bit access space. The function of
pins in ports A to H is the same as in externally expanded mode with on-chip ROM enabled.
In the flash memory version, user program mode is entered by setting 1 to the SWE bit of
FLMCR1.