Datasheet
Rev.6.00 Oct.28.2004 page 465 of 1016
REJ09B0138-0600H
Section 14 Serial Communication Interface (SCI)
14.1 Overview
The H8S/2357 Group is equipped with a three-channel serial communication interface (SCI). All three channels have the
same functions. The SCI can handle both asynchronous and clocked synchronous serial communication. A function is also
provided for serial communication between processors (multiprocessor communication function).
14.1.1 Features
SCI features are listed below.
• Choice of asynchronous or clocked synchronous serial communication mode
Asynchronous mode
Serial data communication executed using asynchronous system in which synchronization is achieved character by
character
Serial data communication can be carried out with standard asynchronous communication chips such as a Universal
Asynchronous Receiver/Transmitter (UART) or Asynchronous Communication Interface Adapter (ACIA)
A multiprocessor communication function is provided that enables serial data communication with a number of
processors
Choice of 12 serial data transfer formats
Data length : 7 or 8 bits
Stop bit length : 1 or 2 bits
Parity : Even, odd, or none
Multiprocessor bit : 1 or 0
Receive error detection : Parity, overrun, and framing errors
Break detection : Break can be detected by reading the RxD pin level
directly in case of a framing error
Clocked Synchronous mode
Serial data communication synchronized with a clock
Serial data communication can be carried out with other chips that have a synchronous communication function
One serial data transfer format
Data length : 8 bits
Receive error detection : Overrun errors detected
• Full-duplex communication capability
The transmitter and receiver are mutually independent, enabling transmission and reception to be executed
simultaneously
Double-buffering is used in both the transmitter and the receiver, enabling continuous transmission and continuous
reception of serial data
• Choice of LSB-first or MSB-first transfer
Can be selected regardless of the communication mode* (except in the case of 7-bit data asynchronous mode)
• On-chip baud rate generator allows any bit rate to be selected
• Choice of serial clock source
Internal clock from baud rate generator or external clock from SCK pin