Datasheet

Section 19 ROM
Rev.6.00 Sep. 27, 2007 Page 885 of 1268
REJ09B0220-0600
Table 19.54 Software Protection
Functions
Item Description Program Erase
SWE bit protection
• Clearing the SWE1 bit to 0 in FLMCR1 sets
the program/erase-protected state for area
H'000000 to H'03FFFF (Execute in on-chip
RAM, external memory, or addresses
H'040000 to H'07FFFF)
• Clearing the SWE2 bit to 0 in FLMCR2 sets
the program/erase-protected state for area
H'040000 to H'07FFFF (Execute in on-chip
RAM, external memory, or addresses
H'000000 to H'03FFFF)
Yes Yes
Block specification
protection
• Erase protection can be set for individual
blocks by settings in erase block registers 1
and 2 (EBR1, EBR2).
• Setting EBR1 and EBR2 to H'00 places all
blocks in the erase-protected state.
— Yes
Emulation protection
• Setting the RAMS bit to 1 in the RAM
emulation register (RAMER) places all blocks
in the program/erase-protected state.
Yes Yes
19.26.3 Error Protection
In error protection, an error is detected when MCU runaway occurs during flash memory
programming/erasing, or operation is not performed in accordance with the program/erase
algorithm, and the program/erase operation is aborted. Aborting the program/erase operation
prevents damage to the flash memory due to overprogramming or overerasing.
If the MCU malfunctions during flash memory programming/erasing, the FLER bit is set to 1 in
FLMCR2 and the error protection state is entered. The FLMCR1, FLMCR2, EBR1, and EBR2
settings are retained, but program mode or erase mode is aborted at the point at which the error
occurred. Program mode or erase mode cannot be re-entered by re-setting the P1, P2, E1, or E2
bit. However, PV1, PV2, EV1, and EV2 bit setting is enabled, and a transition can be made to
verify mode.