Datasheet

Section 19 ROM
Rev.6.00 Sep. 27, 2007 Page 848 of 1268
REJ09B0220-0600
Period during which flash memory access is prohibited
(x: Wait time after setting SWE bit)
*3
Period during which flash memory can be programmed
(Execution of program in flash memory prohibited, and data reads other than verify operations prohibited)
φ
V
CC
FWE
t
OSC1
Min 0 μs
t
MDS
t
MDS
t
MDS
*2
t
RESW
MD2 to MD0
RES
SWE bit
Mode
change
*1
Mode
change
*1
Boot
mode
User
mode
User program mode
SWE
set
SWE
cleared
Programming/erasing possible
Wait time: x
Wait time: 100 μs
Programming/erasing possible
Wait time: x
Wait time: 100 μs
Programming/erasing possible
Wait time: x
Wait time: 100 μs
Programming/erasing possible
Wait time: x
Wait time: 100 μs
User
mode
User program
mode
Notes: 1. When entering boot mode or making a transition from boot mode to another mode, mode switching must be
carried out by means of RES input. The state of ports with multiplexed address functions and bus control
output pins (AS, RD, WR) will change during this switchover interval (the interval during which the RES pin
input is low), and therefore these pins should not be used as output signals during this time.
2. When making a transition from boot mode to another mode, a mode programming setup time t
MDS
(min) of 200
ns is necessary with respect to RES clearance timing.
3. See section 22.2.6, Flash Memory Characteristics.
Figure 19.58 Mode Transition Timing
(Example: Boot Mode → User Mode ↔ User Program Mode)