Datasheet

Section 2 CPU
Rev.6.00 Sep. 27, 2007 Page 53 of 1268
REJ09B0220-0600
Type Instruction Size
*
1
Function
Arithmetic
operations
DIVXS B/W Rd ÷ Rs Rd
Performs signed division on data in two general
registers: either 16 bits ÷ 8 bits 8-bit quotient and 8-bit
remainder or 32 bits ÷ 16 bits 16-bit quotient and 16-
bit remainder.
CMP B/W/L Rd – Rs, Rd – #IMM
Compares data in a general register with data in another
general register or with immediate data, and sets CCR
bits according to the result.
NEG B/W/L 0 – Rd Rd
Takes the two's complement (arithmetic complement) of
data in a general register.
EXTU W/L Rd (zero extension) Rd
Extends the lower 8 bits of a 16-bit register to word size,
or the lower 16 bits of a 32-bit register to longword size,
by padding with zeros on the left.
EXTS W/L Rd (sign extension) Rd
Extends the lower 8 bits of a 16-bit register to word size,
or the lower 16 bits of a 32-bit register to longword size,
by extending the sign bit.
TAS B @ERd – 0, 1 (<bit 7> of @Erd)
*
2
Tests memory contents, and sets the most significant bit
(bit 7) to 1.