Datasheet

Section 19 ROM
Rev.6.00 Sep. 27, 2007 Page 750 of 1268
REJ09B0220-0600
19.5 Register Descriptions
19.5.1 Flash Memory Control Register 1 (FLMCR1)
Bit : 7 6 5 4 3 2 1 0
FWE SWE ESU PSU EV PV E P
Initial value : 1 0 0 0 0 0 0 0
R/W : R R/W R/W R/W R/W R/W R/W R/W
FLMCR1 is an 8-bit register used for flash memory operating mode control. Program-verify mode
or erase-verify mode is entered by setting SWE to 1, then setting the EV or PV bit. Program mode
is entered by setting SWE to 1, then setting the PSU bit, and finally setting the P bit. Erase mode is
entered by setting SWE to 1, then setting the ESU bit, and finally setting the E bit. FLMCR1 is
initialized to H'80 by a reset, and in hardware standby mode and software standby mode. When
on-chip flash memory is disabled, a read will return H'00, and writes are invalid.
Writing to bits ESU, PSU, EV, and PV in FLMCR1 is enabled only when SWE = 1; writing to the
E bit is enabled only when SWE = 1, and ESU = 1; and writing to the P bit is enabled only when
SWE = 1, and PSU = 1.
Bit 7—Flash Write Enable Bit (FWE): Sets hardware protection against flash memory
programming/erasing. These bits cannot be modified and are always read as 1 in this model.
Bit 6—Software Write Enable Bit (SWE): Enables or disables flash memory programming and
erasing. This bit should be set when setting bits 5 to 0 in FLMCR1, EBR1 bits 7 to 0, and EBR2
bits 5 to 0.
When SWE = 1, the flash memory can only be read in program-verify or erase-verify mode.
Bit 6
SWE Description
0 Writes disabled (Initial value)
1 Writes enabled