Datasheet

Section 16 A/D Converter (8 Analog Input Channel Version)
Rev.6.00 Sep. 27, 2007 Page 716 of 1268
REJ09B0220-0600
Table 16.4 A/D Conversion Time (Single Mode)
CKS1 = 0 CKS1 = 1
CKS = 0 CKS = 1 CKS = 0 CKS = 1
Item Symbol Min Typ Max Min Typ Max Min Typ Max Min Typ Max
A/D conversion
start delay
t
D
18 — 33 4 — 5 10 — 17 6 — 9
Input sampling
time
t
SPL
— 127 — — 15 — — 63 — — 31 —
A/D conversion
time
t
CONV
515 — 530 67 — 68 259 — 266 131 — 134
Note: Values in the table are the number of states.
Table 16.5 A/D Conversion Time (Scan Mode)
CKS1 CKS Conversion Time (States)
0 0 512 (Fixed)
1 64 (Fixed)
1 0 256 (Fixed)
1 128 (Fixed)
16.4.4 External Trigger Input Timing
A/D conversion can be externally triggered. When the TRGS1 and TRGS0 bits are set to B'11 in
ADCR, external trigger input is enabled at the ADTRG pin. A falling edge at the ADTRG pin sets
the ADST bit to 1 in ADCSR, starting A/D conversion. Other operations, in both single and scan
modes, are the same as when the ADST bit has been set to 1 by software. Figure 16.6 shows the
timing.