Datasheet

Section 15 Smart Card Interface
Rev.6.00 Sep. 27, 2007 Page 668 of 1268
REJ09B0220-0600
15.1.2 Block Diagram
Figure 15.1 shows a block diagram of the smart card interface.
Bus interface
TDR
RSR
RDR
Module data bus
TSR
SCMR
SSR
SCR
Transmission/
reception control
BRR
Baud rate
generator
Internal
data bus
RxD
TxD
SCK
Parity generation
Parity check
Clock
φ
φ/4
φ/16
φ/64
TXI
RXI
ERI
SMR
Legend:
SCMR: Smart card mode register
RSR: Receive shift register
RDR: Receive data register
TSR: Transmit shift register
TDR: Transmit data register
SMR: Serial mode register
SCR: Serial control register
SSR: Serial status register
BRR: Bit rate register
Figure 15.1 Block Diagram of Smart Card Interface