Datasheet

Section 13 Watchdog Timer
Rev.6.00 Sep. 27, 2007 Page 593 of 1268
REJ09B0220-0600
13.3.4 Timing of Watchdog Timer Overflow Flag (WOVF) Setting
The WOVF flag is set to 1 if TCNT overflows during watchdog timer operation. At the same time,
the WDTOVF signal
*
goes low. If TCNT overflows while the RSTE bit in RSTCSR is set to 1, an
internal reset signal is generated for the entire chip. Figure 13.7 shows the timing in this case.
Note: * The WDTOVF pin function cannot be used in the F-ZTAT versions.
φ
TCNT
Note: * The WDTOVF pin function cannot be used in the F-ZTAT versions.
H'FF H'00
Overflow signal
(internal signal)
WOVF
WDTOVF signal*
Internal reset
signal
132 states
518 states
Figure 13.7 Timing of WOVF Setting