Datasheet

Section 12 8-Bit Timers
Rev.6.00 Sep. 27, 2007 Page 579 of 1268
REJ09B0220-0600
No.
Timing of Switchover
by Means of CKS1
and CKS0 Bits
TCNT Clock Operation
4 Switching from high
to high
Clock before
switchover
Clock after
switchover
TCNT clock
TCNT
CKS bit write
NN+1N+2
Notes: 1. Includes switching from low to stop, and from stop to low.
2. Includes switching from stop to high.
3. Includes switching from high to stop.
4. Generated on the assumption that the switchover is a falling edge; TCNT is
incremented.
12.6.6 Interrupts and Module Stop Mode
If module stop mode is entered when an interrupt has been requested, it will not be possible to
clear the CPU interrupt source or the DMAC
*
or DTC activation source. Interrupts should
therefore be disabled before entering module stop mode.
Note: * The DMAC is not supported in the H8S/2321.