Datasheet

Section 10 16-Bit Timer Pulse Unit (TPU)
Rev.6.00 Sep. 27, 2007 Page 511 of 1268
REJ09B0220-0600
Table 10.13 lists the TPU interrupt sources.
Table 10.13 TPU Interrupts
Channel
Interrupt
Source Description
DMAC
*
Activation
DTC
Activation Priority
0 TGI0A TGR0A input capture/compare match Possible Possible High
TGI0B TGR0B input capture/compare match Not possible Possible
TGI0C TGR0C input capture/compare match Not possible Possible
TGI0D TGR0D input capture/compare match Not possible Possible
TCI0V TCNT0 overflow Not possible Not possible
1 TGI1A TGR1A input capture/compare match Possible Possible
TGI1B TGR1B input capture/compare match Not possible Possible
TCI1V TCNT1 overflow Not possible Not possible
TCI1U TCNT1 underflow Not possible Not possible
2 TGI2A TGR2A input capture/compare match Possible Possible
TGI2B TGR2B input capture/compare match Not possible Possible
TCI2V TCNT2 overflow Not possible Not possible
TCI2U TCNT2 underflow Not possible Not possible
3 TGI3A TGR3A input capture/compare match Possible Possible
TGI3B TGR3B input capture/compare match Not possible Possible
TGI3C TGR3C input capture/compare match Not possible Possible
TGI3D TGR3D input capture/compare match Not possible Possible
TCI3V TCNT3 overflow Not possible Not possible
4 TGI4A TGR4A input capture/compare match Possible Possible
TGI4B TGR4B input capture/compare match Not possible Possible
TCI4V TCNT4 overflow Not possible Not possible
TCI4U TCNT4 underflow Not possible Not possible
5 TGI5A TGR5A input capture/compare match Possible Possible
TGI5B TGR5B input capture/compare match Not possible Possible
TCI5V TCNT5 overflow Not possible Not possible
TCI5U TCNT5 underflow Not possible Not possible Low
Notes: This table shows the initial state immediately after a reset. The relative channel priorities
can be changed by the interrupt controller.
* The DMAC is not supported in the H8S/2321.