Datasheet

Section 10 16-Bit Timer Pulse Unit (TPU)
Rev.6.00 Sep. 27, 2007 Page 480 of 1268
REJ09B0220-0600
10.2.10 Module Stop Control Register (MSTPCR)
MSTPCRH MSTPCRL
Bit : 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value : 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1
R/W : R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
MSTPCR is a 16-bit readable/writable register that performs module stop mode control.
When the MSTP13 bit in MSTPCR is set to 1, TPU operation stops at the end of the bus cycle and
a transition is made to module stop mode. Registers cannot be read or written to in module stop
mode. For details, see section 21.5, Module Stop Mode.
MSTPCR is initialized to H'3FFF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Bit 13—Module Stop (MSTP13): Specifies the TPU module stop mode.
Bit 13
MSTP13 Description
0 TPU module stop mode cleared
1 TPU module stop mode set (Initial value)