Datasheet

Section 10 16-Bit Timer Pulse Unit (TPU)
Rev.6.00 Sep. 27, 2007 Page 471 of 1268
REJ09B0220-0600
Bit 5
TCIEU Description
0 Interrupt requests (TCIU) by TCFU disabled (Initial value)
1 Interrupt requests (TCIU) by TCFU enabled
Bit 4—Overflow Interrupt Enable (TCIEV): Enables or disables interrupt requests (TCIV) by
the TCFV bit when the TCFV bit in TSR is set to 1.
Bit 4
TCIEV Description
0 Interrupt requests (TCIV) by TCFV disabled (Initial value)
1 Interrupt requests (TCIV) by TCFV enabled
Bit 3—TGR Interrupt Enable D (TGIED): Enables or disables interrupt requests (TGID) by the
TGFD bit when the TGFD bit in TSR is set to 1 in channels 0 and 3.
In channels 1, 2, 4, and 5, bit 3 is reserved. It is always read as 0 and cannot be modified.
Bit 3
TGIED Description
0 Interrupt requests (TGID) by TGFD disabled (Initial value)
1 Interrupt requests (TGID) by TGFD enabled
Bit 2—TGR Interrupt Enable C (TGIEC): Enables or disables interrupt requests (TGIC) by the
TGFC bit when the TGFC bit in TSR is set to 1 in channels 0 and 3.
In channels 1, 2, 4, and 5, bit 2 is reserved. It is always read as 0 and cannot be modified.
Bit 2
TGIEC Description
0 Interrupt requests (TGIC) by TGFC disabled (Initial value)
1 Interrupt requests (TGIC) by TGFC enabled
Bit 1—TGR Interrupt Enable B (TGIEB): Enables or disables interrupt requests (TGIB) by the
TGFB bit when the TGFB bit in TSR is set to 1.