Datasheet

Section 9 I/O Ports
Rev.6.00 Sep. 27, 2007 Page 435 of 1268
REJ09B0220-0600
Pin Selection Method and Pin Functions
PF
0
/BREQ
The pin function is switched as shown below according to the combination of
the operating mode, and bits BRLE and PF0DDR.
Operating
Mode
Modes 4 to 6 Mode 7
BRLE 0 1 —
PF0DDR 0 1 — 0 1
Pin function
PF
0
input pin
PF
0
output pin
BREQ
input pin
PF
0
input pin
PF
0
output pin
9.14 Port G
9.14.1 Overview
Port G is a 5-bit I/O port. Port G pins also function as bus control signal output pins (CS
0
to CS
3
,
and CAS
*
). Enabling or disabling of CS
1
to CS
3
output can be changed by a setting in PFCR2.
Figure 9.23 shows the port G pin configuration.
Note: * CAS is not supported in the H8S/2321.
PG
4
/ CS
0
PG
3
/ CS
1
PG
2
/ CS
2
PG
1
/ CS
3
PG
0
/ CAS
*
PG
4
(I/O)
PG
3
(I/O)
PG
2
(I/O)
PG
1
(I/O)
PG
0
(I/O)
Port G pins Pin functions in mode 7Pin functions in modes 4 to 6
PG
4
(input) / CS
0
(output)
PG
3
(I/O) / CS
1
(output)
PG
2
(I/O) / CS
2
(output)
PG
1
(I/O) / CS
3
(output)
PG
0
(I/O) / CAS
*
(output)
Port G
Note: * CAS is not supported in the H8S/2321.
Figure 9.23 Port G Pin Functions