Datasheet

Section 9 I/O Ports
Rev.6.00 Sep. 27, 2007 Page 431 of 1268
REJ09B0220-0600
Port Function Control Register 2 (PFCR2)
Bit : 7 6 5 4 3 2 1 0
WAITPS
BREQOPS CS167E CS25E ASOD — — —
Initial value : 0 0 1 1 0 0 0 0
R/W : R/W R/W R/W R/W R/W R R R
PFCR2 is an 8-bit readable/writable register that performs I/O port control. PFCR2 is initialized to
H'30 by a reset, and in hardware standby mode.
Bit 7—WAIT Pin Select (WAITPS): Selects the WAIT input pin. Set the WAITPS bit before
setting the DDR bit clear to 0 and the WAITE bit in BCRL to 1.
Bit 7
WAITPS Description
0 WAIT input is pin PF
2
(Initial value)
1 WAIT input is pin P5
3
Bit 6—BREQO Pin Select (BREQOPS): Selects the BREQO output pin. Set the BREQOPS bit
before setting the BREQOE bit in BCRL to 1.
Bit 6
BREQOPS Description
0 BREQO output is pin PF
2
(Initial value)
1 BREQO output is pin P5
3
Bit 5—CS167 Enable (CS167E): Enables or disables CS
1
, CS
6
, and CS
7
output. For details, see
section 9.7, Port 6, and section 9.14, Port G.
Bit 4—CS25 Enable (CS25E): Enables or disables CS
2
, CS
3
, CS
4
, and CS
5
output. For details,
see section 9.7, Port 6, and section 9.14, Port G.
Bit 3—AS Output Disable (ASOD): Enables or disables AS output. This bit is valid in modes 4
to 6.
Bit 3
ASOD Description
0 PF
6
is used as AS output pin (Initial value)
1 PF
6
is designated as I/O port, and does not function as AS output pin