Datasheet

Section 9 I/O Ports
Rev.6.00 Sep. 27, 2007 Page 398 of 1268
REJ09B0220-0600
Port Function Control Register 1 (PFCR1)
Bit : 7 6 5 4 3 2 1 0
— — — — A23E A22E A21E A20E
Initial value : 0 0 0 0 1 1 1 1
R/W : R/W R/W R/W R/W R/W R/W R/W R/W
PFCR1 is an 8-bit readable/writable register that performs I/O port control. PFCR1 is initialized to
H'0F by a reset, and in hardware standby mode.
Bits 7 to 4—Reserved: Only 0 should be written to these bits.
Bit 3—Address 23 Enable (A23E): Enables or disables address output 23 (A
23
). This bit is valid
in modes 4 to 6.
Bit 3
A23E Description
0 DR is output when PA7DDR = 1
1 A
23
is output when PA7DDR = 1 (Initial value)
Bit 2—Address 22 Enable (A22E): Enables or disables address output 22 (A
22
). This bit is valid
in modes 4 to 6.
Bit 2
A22E Description
0 DR is output when PA6DDR = 1
1 A
22
is output when PA6DDR = 1 (Initial value)
Bit 1—Address 21 Enable (A21E): Enables or disables address output 21 (A
21
). This bit is valid
in modes 4 to 6.
Bit 1
A21E Description
0 DR is output when PA5DDR = 1
1 A
21
is output when PA5DDR = 1 (Initial value)