Datasheet

Section 9 I/O Ports
Rev.6.00 Sep. 27, 2007 Page 371 of 1268
REJ09B0220-0600
Pin Selection Method and Pin Functions
P2
2
/PO
2
/TIOCC
3
/
TMRI
0
This pin is used as the 8-bit timer counter reset pin when bits CCLR1 and
CCLR0 in TCR0 are both set to 1.
The pin function is switched as shown below according to the combination of
the TPU channel 3 setting (by bits MD3 to MD0 in TMDR3, bits IOC3 to IOC0
in TIOR3L, and bits CCLR2 to CCLR0 in TCR3), bit NDER2 in NDERL, and bit
P22DDR.
TPU Channel
3 Setting Table Below (1) Table Below (2)
P22DDR — 0 1 1
NDER2 — — 0 1
Pin function TIOCC
3
output P2
2
input
P2
2
output
PO
2
output
TIOCC
3
input
*
1
TMRI
0
input
TPU Channel
3 Setting (2) (1) (2) (1) (1) (2)
MD3 to MD0 B'0000 B'001x B'0010 B'0011
IOC3 to IOC0 B'0000
B'0100
B'1xxx
B'0001 to
B'0011
B'0101 to
B'0111
B'xx00 Other than B'xx00
CCLR2 to
CCLR0
— — — — Other
than
B'101
B'101
Output
function
— Output
compare
output
— PWM
mode 1
output
*
2
PWM
mode 2
output
—
x: Don’t care
Notes: 1. TIOCC
3
input when MD3 to MD0 = B'0000, and IOC3 to IOC0 =
B'10xx.
2. TIOCD
3
output is disabled.
When BFA = 1 or BFB = 1 in TMDR3, output is disabled and setting
(2) applies.