Datasheet

Section 9 I/O Ports
Rev.6.00 Sep. 27, 2007 Page 367 of 1268
REJ09B0220-0600
Pin Selection Method and Pin Functions
P2
6
/PO
6
/TIOCA
5
/
TMO
0
The pin function is switched as shown below according to the combination of
the TPU channel 5 setting (by bits MD3 to MD0 in TMDR5, bits IOA3 to IOA0
in TIOR5, and bits CCLR1 and CCLR0 in TCR5), bit NDER6 in NDERL, bits
OS3 to OS0 in TCSR0, and bit P26DDR.
OS3 to OS0 All 0 Not all 0
TPU Channel
5 Setting
Table
Below (1) Table Below (2) —
P26DDR — 0 1 1 —
NDER6 — — 0 1 —
Pin function TIOCA
5
output
P2
6
input
P2
6
output
PO
6
output
TMO
0
output
TIOCA
5
input
*
1
TPU Channel
5 Setting (2) (1) (2) (1) (1) (2)
MD3 to MD0 B'0000, B'01xx B'001x B'0010 B'0011
IOA3 to IOA0 B'0000
B'0100
B'1xxx
B'0001 to
B'0011
B'0101 to
B'0111
B'xx00 Other than B'xx00
CCLR1,
CCLR0
— — — — Other
than B'01
B'01
Output
function
— Output
compare
output
— PWM
mode 1
output
*
2
PWM
mode 2
output
—
x: Don’t care
Notes: 1. TIOCA
5
input when MD3 to MD0 = B'0000 or B'01xx, and IOA3 = 1.
2. TIOCB
5
output is disabled.