Datasheet

Section 9 I/O Ports
Rev.6.00 Sep. 27, 2007 Page 359 of 1268
REJ09B0220-0600
Pin Selection Method and Pin Functions
P1
3
/PO
11
/
TIOCD
0
/TCLKB
The pin function is switched as shown below according to the combination of
the TPU channel 0 setting (by bits MD3 to MD0 in TMDR0, bits IOD3 to IOD0
in TIOR0L, and bits CCLR2 to CCLR0 in TCR0), bits TPSC2 to TPSC0 in
TCR0 to TCR2, bit NDER11 in NDERH, and bit P13DDR.
TPU Channel
0 Setting Table Below (1) Table Below (2)
P13DDR — 0 1 1
NDER11 — — 0 1
Pin function TIOCD
0
output P1
3
input
P1
3
output
PO
11
output
TIOCD
0
input
*
1
TCLKB input
*
2
Notes: 1. TIOCD
0
input when MD3 to MD0 = B'0000, and IOD3 to IOD0 =
B'10xx.
2. TCLKB input when the setting for TCR0 to TCR2 is: TPSC2 to
TPSC0 = B'101.
TCLKB input when channels 1 and 5 are set to phase counting
mode.
TPU Channel
0 Setting (2) (1) (2) (2) (1) (2)
MD3 to MD0 B'0000 B'0010 B'0011
IOD3 to IOD0 B'0000
B'0100
B'1xxx
B'0001 to
B'0011
B'0101 to
B'0111
— B'xx00 Other than B'xx00
CCLR2 to
CCLR0
— — — — Other
than
B'110
B'110
Output
function
— Output
compare
output
— — PWM
mode 2
output
—
x: Don’t care