Datasheet

Section 9 I/O Ports
Rev.6.00 Sep. 27, 2007 Page 354 of 1268
REJ09B0220-0600
Port 1 Data Register (P1DR)
Bit : 7 6 5 4 3 2 1 0
P17DR P16DR P15DR P14DR P13DR P12DR P11DR P10DR
Initial value : 0 0 0 0 0 0 0 0
R/W : R/W R/W R/W R/W R/W R/W R/W R/W
P1DR is an 8-bit readable/writable register that stores output data for the port 1 pins (P1
7
to P1
0
).
P1DR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Port 1 Register (PORT1)
Bit : 7 6 5 4 3 2 1 0
P17 P16 P15 P14 P13 P12 P11 P10
Initial value : —
*
—
*
—
*
—
*
—
*
—
*
—
*
—
*
R/W : R R R R R R R R
Note: * Determined by state of pins P1
7
to P1
0
.
PORT1 is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port 1 pins (P1
7
to P1
0
) must always be performed on P1DR.
If a port 1 read is performed while P1DDR bits are set to 1, the P1DR values are read. If a port 1
read is performed while P1DDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORT1 contents are determined by the pin states, as
P1DDR and P1DR are initialized. PORT1 retains its prior state in software standby mode.