Datasheet
Section 9 I/O Ports
Rev.6.00 Sep. 27, 2007 Page 349 of 1268
REJ09B0220-0600
Port Description Pins Mode 4
*
1
Mode 5
*
1
Mode 6 Mode 7
Port 5 • 4-bit I/O
port
• Schmitt-
triggered
input
(IRQ input
only)
P5
3
/ADTRG/IRQ7/WAIT/
BREQO
I/O port also functioning as A/D converter
input pin (ADTRG), and as interrupt input pin
(IRQ
7
) when IRQPAS = 1, WAIT input pin
when WAITE = 1, BREQOE = 0, WAITPS =
1, DDR = 0, and WAITE = 0, BREQOE = 1,
BREQO output pin when BREQOPS = 1
I/O port also
functioning as
A/D converter
input pin
(ADTRG),
and as inter-
rupt input pin
(IRQ
7
) when
IRQPAS = 1
P5
2
/SCK
2
/IRQ
6
P5
1
/RxD
2
/IRQ
5
P5
0
/TxD
2
/IRQ
4
I/O port also functioning as SCI (channel 2) I/O pins (TxD
2
,
RxD
2
, SCK
2
), and as interrupt input pins (IRQ
4
to IRQ
6
)
when IRQPAS = 1
Port 6 • 8-bit I/O
port
• Schmitt-
triggered
input
(P6
4
to P6
7
)
P6
7
/IRQ
3
/CS
7
P6
6
/IRQ
2
/CS
6
P6
5
/IRQ
1
P6
4
/IRQ
0
P6
3
/TEND
1
*
2
P6
2
/DREQ
1
*
2
P6
1
/TEND
0
*
2
/CS
5
P6
0
/DREQ
0
*
2
/CS
4
8-bit I/O port also functioning as DMA
controller I/O pins (DREQ
0
, TEND
0
, DREQ
1
,
TEND
1
)
*
2
, bus control output pins (CS
4
to
CS
7
), and interrupt input pins (IRQ
0
to IRQ
3
)
8-bit I/O port
also function-
ing as inter-
rupt input pins
(IRQ
0
to IRQ
3
)
Port A PA
7
/A
23
/IRQ
7
PA
6
/A
22
/IRQ
6
PA
5
/A
21
/IRQ
5
When DDR = 0 (after reset):
dual function as input ports
and interrupt input pins (IRQ
7
to IRQ
5
)
When DDR = 1 and A23E to
A21E = 1: address output
When DDR = 1 and A23E to
A21E = 0: DR value output
Dual function
as I/O ports
and interrupt
input pins
(IRQ
7
to IRQ
4
)
• 8-bit I/O
port
• Built-in
MOS input
pull-up
• Open-drain
output
capability
• Schmitt-
triggered
input
(PA
4
to
PA
7
)
PA
4
/A
20
/IRQ
4
I/O port also functioning as
address output and interrupt
input pin (IRQ
4
)
When DDR =
0 (after reset):
dual function
as input ports
and interrupt
input pins
(IRQ
7
to IRQ
4
)
When DDR =
1 and A23E to
A20E = 1:
address
output
When DDR =
1 and A23E to
A20E = 0: DR
value output
PA
3
/A
19
to PA
0
/A
16
Address output When DDR =
0 (after reset):
input ports
When DDR =
1: address
output
I/O ports