Datasheet

Section 8 Data Transfer Controller
Rev.6.00 Sep. 27, 2007 Page 317 of 1268
REJ09B0220-0600
8.2.3 DTC Source Address Register (SAR)
Bit : 23 22 21 20 19 – – – 4 3 2 1 0
– – –
Initial value :
Unde-
fined
Unde-
fined
Unde-
fined
Unde-
fined
Unde-
fined
– – – Unde-
fined
Unde-
fined
Unde-
fined
Unde-
fined
Unde-
fined
R/W : — — — — — – – – — — — — —
SAR is a 24-bit register that designates the source address of data to be transferred by the DTC.
For word-size transfer, specify an even source address.
8.2.4 DTC Destination Address Register (DAR)
Bit : 23 22 21 20 19 – – – 4 3 2 1 0
– – –
Initial value :
Unde-
fined
Unde-
fined
Unde-
fined
Unde-
fined
Unde-
fined
– – – Unde-
fined
Unde-
fined
Unde-
fined
Unde-
fined
Unde-
fined
R/W : — — — — — – – – — — — — —
DAR is a 24-bit register that designates the destination address of data to be transferred by the
DTC. For word-size transfer, specify an even destination address.