Datasheet

Section 7 DMA Controller (Not Supported in the H8S/2321)
Rev.6.00 Sep. 27, 2007 Page 293 of 1268
REJ09B0220-0600
Single Address Mode (Write): Figure 7.29 shows a transfer example in which TEND output is
enabled and byte-size single address mode transfer (write) is performed from an external device to
external 8-bit, 2-state access space.
DMA write
φ
A
ddress bus
DMA
dead
HWR
DACK
TEND
Bus
release
LWR
DMA write DMA write DMA write
Bus
release
Bus
release
Bus
release
Bus
release
Last transfer
cycle
Figure 7.29 Example of Single Address Mode (Byte Write) Transfer