Datasheet

Section 7 DMA Controller (Not Supported in the H8S/2321)
Rev.6.00 Sep. 27, 2007 Page 255 of 1268
REJ09B0220-0600
7.5 Operation
7.5.1 Transfer Modes
Table 7.5 lists the DMAC modes.
Table 7.5 DMAC Transfer Modes
Transfer Mode Transfer Source Remarks
Short
address
mode
Dual
address
mode
(1) Sequential
mode
(2) Idle mode
(3) Repeat mode
• TPU channel 0 to 5
compare match/input
capture A interrupt
• SCI transmit-data-
empty interrupt
• SCI receive-data-full
interrupt
• A/D converter
conversion end
interrupt
• External request
• Up to 4 channels can
operate independently
• External request
applies to channel B
only
• Single address mode
applies to channel B
only
• Modes (1), (2), and (3)
can also be specified
for single address
mode
(4) Single address mode
Full
address
mode
(5) Normal mode
• External request
• Auto-request
• Max. 2-channel
operation, combining
channels A and B
(6) Block transfer mode
• TPU channel 0 to 5
compare match/input
capture A interrupt
• SCI transmit-data-
empty interrupt
• SCI receive-data-full
interrupt
• A/D converter
conversion end
interrupt
• External request
• With auto-request,
burst mode transfer or
cycle steal transfer
can be selected