Datasheet

Section 7 DMA Controller (Not Supported in the H8S/2321)
Rev.6.00 Sep. 27, 2007 Page 238 of 1268
REJ09B0220-0600
7.3.3 Execute Transfer Count Register (ETCR)
ETCR is a 16-bit readable/writable register that specifies the number of transfers. The function of
this register is different in normal mode and in block transfer mode.
ETCR is not initialized by a reset or in standby mode.
Normal Mode
ETCRA
Transfer Counter
Bit : 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Initial value : * * * * * * * * * * * * * * * *
R/W : R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
*: Undefined
In normal mode, ETCRA functions as a 16-bit transfer counter. ETCRA is decremented by 1 each
time a transfer is performed, and transfer ends when the count reaches H'0000. ETCRB is not used
at this time.
ETCRB
ETCRB is not used in normal mode.