Datasheet

Section 7 DMA Controller (Not Supported in the H8S/2321)
Rev.6.00 Sep. 27, 2007 Page 220 of 1268
REJ09B0220-0600
Table 7.1 (2) Overview of DMAC Functions (Full Address Mode)
Address Register Bit Length
Transfer Mode Transfer Source Source Destination
• Normal mode
Auto-request
⎯ Transfer request retained internally
⎯ Transfers continue for the specified
number of times (1 to 65,536)
⎯ Choice of burst or cycle steal
transfer
• Auto-request
24 24
External request
⎯ 1-byte or 1-word transfer executed
for one transfer request
⎯ 1 to 65,536 transfers
• External request
• Block transfer mode
⎯ Specified block size transfer
executed for one transfer request
⎯ 1 to 65,536 transfers
⎯ Either source or destination
specifiable as block area
⎯ Block size: 1 to 256 bytes or words
• TPU channel 0 to
5 compare
match/input
capture A
interrupt
• SCI transmit-
data-empty
interrupt
• SCI receive-
data-full interrupt
• External request
• A/D converter
conversion end
interrupt
24 24