Datasheet

Section 6 Bus Controller
Rev.6.00 Sep. 27, 2007 Page 207 of 1268
REJ09B0220-0600
T
p
T
r
T
c1
T
c2
T
1
T
1
T
2
T
3
T
c1
T
c2
T
c1
EXTAL
Address
RD
RAS
CAS, LCAS
Data bus
DRAM space read External read DRAM space read
Idle cycle
Figure 6.35 (a) Example of Idle Cycle Operation in RAS Down Mode (ICIS1 = 1)
T
p
T
r
T
c1
T
c2
T
1
T
1
T
2
T
3
T
c1
T
c2
T
c1
EXTAL
Address
RD
RAS
CAS, LCAS
Data bus
DRAM space read External read DRAM space write
Idle cycle
HWR
Figure 6.35 (b) Example of Idle Cycle Operation in RAS Down Mode (ICIS0 = 1)