Datasheet

Section 6 Bus Controller
Rev.6.00 Sep. 27, 2007 Page 190 of 1268
REJ09B0220-0600
6.5.9 Byte Access Control
When DRAM with a ×16 configuration is connected, the 2-CAS system can be used for the
control signals required for byte access.
Figure 6.18 shows the control timing in the 2-CAS system, and figure 6.19 shows an example of
2-CAS type DRAM connection.
T
p
φ
CSn (RAS)
Byte control
A
23
to A
0
T
r
T
c1
T
c2
Row
CAS
LCAS
HWR (WE)
Column
Note: n = 2 to 5
Figure 6.18 2-CAS System Control Timing (Upper Byte Write Access)