Datasheet

Section 6 Bus Controller
Rev.6.00 Sep. 27, 2007 Page 146 of 1268
REJ09B0220-0600
6.1.3 Pin Configuration
Table 6.1 summarizes the pins of the bus controller.
Table 6.1 Bus Controller Pins
Name Symbol I/O Function
Address strobe AS Output Strobe signal indicating that address output
on address bus is enabled.
Read RD Output Strobe signal indicating that external space
is being read.
High write/write enable HWR Output Strobe signal indicating that external space
is to be written, and upper half (D
15
to D
8
) of
data bus is enabled.
2-CAS DRAM write enable signal
*
.
Low write LWR Output Strobe signal indicating that external space
is to be written, and lower half (D
7
to D
0
) of
data bus is enabled.
Chip select 0 CS0 Output Strobe signal indicating that area 0 is
selected.
Chip select 1 CS1 Output Strobe signal indicating that area 1 is
selected.
Chip select 2/row address
strobe 2
CS2 Output Strobe signal indicating that area 2 is
selected.
DRAM row address strobe signal when
area 2 is in DRAM space
*
.
Chip select 3/row address
strobe 3
CS3 Output Strobe signal indicating that area 3 is
selected.
DRAM row address strobe signal when
area 3 is in DRAM space
*
.
Chip select 4/row address
strobe 4
CS4 Output Strobe signal indicating that area 4 is
selected.
DRAM row address strobe signal when
area 4 is in DRAM space
*
.
Chip select 5/row address
strobe 5
CS5 Output Strobe signal indicating that area 5 is
selected.
DRAM row address strobe signal when
area 5 is in DRAM space
*
.