Datasheet

Rev.6.00 Sep. 27, 2007 Page xii of xxx
REJ09B0220-0600
2.8.5 Bus-Released State...............................................................................................72
2.8.6 Power-Down State ...............................................................................................73
2.9 Basic Timing.....................................................................................................................73
2.9.1 Overview..............................................................................................................73
2.9.2 On-Chip Memory (ROM, RAM).........................................................................73
2.9.3 On-Chip Supporting Module Access Timing.......................................................75
2.9.4 External Address Space Access Timing ..............................................................76
2.10 Usage Note........................................................................................................................76
2.10.1 TAS Instruction....................................................................................................76
Section 3 MCU Operating Modes .....................................................................77
3.1 Overview...........................................................................................................................77
3.1.1 Operating Mode Selection (H8S/2328B F-ZTAT, H8S/2326 F-ZTAT)..............77
3.1.2 Operating Mode Selection (Mask ROM and ROMless Versions,
H8S/2329B F-ZTAT)...........................................................................................78
3.1.3 Register Configuration.........................................................................................80
3.2 Register Descriptions........................................................................................................80
3.2.1 Mode Control Register (MDCR) .........................................................................80
3.2.2 System Control Register (SYSCR)......................................................................81
3.2.3 System Control Register 2 (SYSCR2) (F-ZTAT Version Only) .........................82
3.3 Operating Mode Descriptions ...........................................................................................83
3.3.1 Mode 1.................................................................................................................83
3.3.2 Mode 2 (H8S/2329B F-ZTAT Only) ...................................................................83
3.3.3 Mode 3 (H8S/2329B F-ZTAT Only) ...................................................................83
3.3.4 Mode 4 (Expanded Mode with On-Chip ROM Disabled) ...................................83
3.3.5 Mode 5 (Expanded Mode with On-Chip ROM Disabled) ...................................84
3.3.6 Mode 6 (Expanded Mode with On-Chip ROM Enabled) ....................................84
3.3.7 Mode 7 (Single-Chip Mode)................................................................................84
3.3.8 Modes 8 and 9 (H8S/2328B F-ZTAT and H8S/2326 F-ZTAT Only) .................84
3.3.9 Mode 10 (H8S/2328B F-ZTAT and H8S/2326 F-ZTAT Only)...........................84
3.3.10 Mode 11 (H8S/2328B F-ZTAT and H8S/2326 F-ZTAT Only)...........................85
3.3.11 Modes 12 and 13..................................................................................................85
3.3.12 Mode 14 (H8S/2328B F-ZTAT and H8S/2326 F-ZTAT Only)...........................85
3.3.13 Mode 15 (H8S/2328B F-ZTAT and H8S/2326 F-ZTAT Only)...........................85
3.4 Pin Functions in Each Operating Mode ............................................................................85
3.5 Memory Map in Each Operating Mode ............................................................................86
Section 4 Exception Handling...........................................................................101
4.1 Overview...........................................................................................................................101
4.1.1 Exception Handling Types and Priority...............................................................101