Datasheet

Section 3 MCU Operating Modes
Rev.6.00 Sep. 27, 2007 Page 97 of 1268
REJ09B0220-0600
Modes 4 and 5
(advanced expanded modes
with on-chip ROM disabled)
Mode 6
(advanced expanded mode
with on-chip ROM enabled)
Mode 7
(advanced single-chip
mode)
External address
space
On-chip ROM
On-chip RAM
*2
Notes: 1. External addresses when EAE = 1 in BCRL; reserved area when EAE = 0.
2. External addresses can be accessed by clearing the RAME bit in SYSCR to 0.
3. Do not access a reserved area.
Internal
I/O registers
On-chip ROM
Reserved area
*3
Reserved area
*3
Reserved area
*3
External address
space
External address
space
Internal
I/O registers
External address
space
On-chip RAM
*2
On-chip RAM
Internal
I/O registers
External address
space
Internal
I/O registers
Internal
I/O registers
Internal
I/O registers
External address
space
H'000000 H'000000 H'000000
H'040000
H'FFFC00
H'FFFFFF
H'FFDC00H'FFDC00H'FFDC00
H'FFFBFF
H'FFFFFF
H'FFFF08
H'FFFE50
H'FFFF07
H'FFFF28
H'FFFF28
External address
space/reserved
area
*1 *3
H'FFFE50
H'010000 H'010000
H'008000 H'008000
H'03FFFF
H'FFFC00
H'FFFFFF
H'FFFF08
H'FFFF28
H'FFFE50
Figure 3.6 H8S/2323 Memory Map in Each Operating Mode