Datasheet

Appendix C I/O Port Block Diagrams
Rev.6.00 Sep. 27, 2007 Page 1256 of 1268
REJ09B0220-0600
R
PGnDDR
C
QD
Reset
WDDRG
Reset
WDRG
R
PGnDR
C
QD
PG
n
RDRG
RPORG
Bus controller
Chip select
Mode 7
Modes
4 to 6
Legend:
WDDRG: Write to PGDDR
WDRG: Write to PGDR
RDRG: Read PGDR
RPORG: Read port G
CS25E: CS25 enable
Note: n = 1 or 2
Internal data bus
Interrupt controlle
r
CS25E
Figure C.13 (b) Port G Block Diagram (Pins PG
1
and PG
2
)