Datasheet

Appendix C I/O Port Block Diagrams
Rev.6.00 Sep. 27, 2007 Page 1240 of 1268
REJ09B0220-0600
C.7 Port A
R
PAnPCR
C
QD
Reset
WPCRA
Reset
Reset
WDRA
R
C
QD
PA
n
RDRA
RODRA
RPORA
Internal address bus
PAnDR
Reset
WDDRA
R
C
QD
PAnDDR
WODRA
RPCRA
R
C
QD
PAnODR
*1
*2
Mode 7
Modes 4 to 6
Modes 4 and 5
Modes 6 and 7
Legend:
WDDRA: Write to PADDR
WDRA: Write to PADR
WODRA: Write to PAODR
WPCRA: Write to PAPCR
RDRA: Read PADR
RPORA: Read port A
RODRA: Read PAODR
RPCRA: Read PAPCR
Internal data bus
Notes: n = 0 to 3
1. Output enable signal
2. Open drain control signal
Figure C.7 (a) Port A Block Diagram (Pins PA
0
to PA
3
)