Datasheet

Appendix C I/O Port Block Diagrams
Rev.6.00 Sep. 27, 2007 Page 1237 of 1268
REJ09B0220-0600
R
P63DDR
C
QD
Reset
WDDR6
Reset
WDR6
R
C
QD
P6
3
RDR6
RPOR6
Internal data bus
DMA controller
*
DMA transfer end enable
DMA transfer end
P63DR
Legend:
WDDR6: Write to P6DDR
WDR6: Write to P6DR
RDR6: Read P6DR
RPOR6: Read port 6
Note: * The DMAC is not supported in the H8S/2321.
Figure C.6 (d) Port 6 Block Diagram (Pin P6
3
)