Datasheet

Appendix C I/O Port Block Diagrams
Rev.6.00 Sep. 27, 2007 Page 1224 of 1268
REJ09B0220-0600
R
P2nDDR
C
QD
Reset
WDDR2
Reset
WDR2
R
P2nDR
C
QD
P2
n
RDR2
RPOR2
PPG module
TPU module
Pulse output enable
Output compare output
/
PWM output enable
Counter external clock
inpu
Output compare output
/
PWM output
Pulse output
8-bit timer module
Input capture input
Legend:
WDDR2: Write to P2DDR
WDR2: Write to P2DR
RDR2: Read P2DR
RPOR2: Read port 2
Note: n = 3 or 5
Internal data bus
Figure C.2 (c) Port 2 Block Diagram (Pins P2
3
and P2
5
)