Datasheet

Section 3 MCU Operating Modes
Rev.6.00 Sep. 27, 2007 Page 87 of 1268
REJ09B0220-0600
Mode 2 Boot Mode
(advanced expanded mode
with on-chip ROM enabled)
Mode 3 Boot Mode
(advanced single-chip
mode)
On-chip ROM On-chip ROM
On-chip ROM/
reserved area
*2 *5
External address
space
Reseved area
*4
Reseved area
*4
Reseved area
*4
Reseved area
*4
On-chip RAM
*3
On-chip RAM
Internal
I/O registers
External address
space
Internal
I/O registers
Internal
I/O registers
Internal
I/O registers
External address
space
H'000000 H'000000
H'FF7400
H'FFFBFF
H'FF7C00
H'FF7400
H'FF7C00
H'FFFFFF
H'FFFE50
H'FFFF07
H'FFFF28
On-chip ROM/
external address
space
*1
H'010000 H'010000
H'07FFFF
H'060000H'060000
H'080000
H'FFFC00
H'FFFFFF
H'FFFF08
H'FFFF28
H'FFFE50
Notes: 1. External addresses when EAE = 1 in BCRL; on-chip ROM when EAE = 0.
2. Reserved area when EAE = 1 in BCRL; on-chip ROM when EAE = 0.
3. On-chip RAM is used for flash memory programming. Do not clear the RAME bit in SYSCR to 0.
4. Access to the reserved areas H'060000 to H'07FFFF and H'FF7400 to H'FF7BFF is prohibited.
5. Do not access a reserved area.
Figure 3.1 (a) H8S/2329B Memory Map in Each Operating Mode