Datasheet

Appendix B Internal I/O Registers
Rev.6.00 Sep. 27, 2007 Page 1148 of 1268
REJ09B0220-0600
PORTG—Port G Register H'FF5F Port G
7
—
Undefined
—
6
—
Undefined
—
5
—
Undefined
—
4
PG4
—*
R
3
PG3
—*
R
0
PG0
—*
R
2
PG2
—*
R
1
PG1
—*
R
State of port G pins
Note: * Determined by the state of pins PG
4
to PG
0
.
Bit
Initial value
Read/Write
:
:
:
P1DR—Port 1 Data Register H'FF60 Port 1
7
P17DR
0
R/W
6
P16DR
0
R/W
5
P15DR
0
R/W
4
P14DR
0
R/W
3
P13DR
0
R/W
0
P10DR
0
R/W
2
P12DR
0
R/W
1
P11DR
0
R/W
Stores output data for port 1 pins (P1
7
to P1
0
)
Bit
Initial value
Read/Write
:
:
:
P2DR—Port 2 Data Register H'FF61 Port 2
7
P27DR
0
R/W
6
P26DR
0
R/W
5
P25DR
0
R/W
4
P24DR
0
R/W
3
P23DR
0
R/W
0
P20DR
0
R/W
2
P22DR
0
R/W
1
P21DR
0
R/W
Stores output data for port 2 pins (P2
7
to P2
0
)
Bit
Initial value
Read/Write
:
:
: