Datasheet

Appendix B Internal I/O Registers
Rev.6.00 Sep. 27, 2007 Page 1144 of 1268
REJ09B0220-0600
PORT1—Port 1 Register H'FF50 Port 1
7
P17
*
R
6
P16
*
R
5
P15
*
R
4
P14
*
R
3
P13
*
R
0
P10
*
R
2
P12
*
R
1
P11
*
R
Note: * Determined by the state of pins P1
7
to P1
0
.
State of port 1 pins
Bit
Initial value
Read/Write
:
:
:
PORT2—Port 2 Register H'FF51 Port 2
7
P27
*
R
6
P26
*
R
5
P25
*
R
4
P24
*
R
3
P23
*
R
0
P20
*
R
2
P22
*
R
1
P21
*
R
State of port 2 pins
Note: * Determined by the state of pins P2
7
to P2
0
.
Bit
Initial value
Read/Write
:
:
:
PORT3—Port 3 Register H'FF52 Port 3
7
Undefined
6
Undefined
5
P35
*
R
4
P34
*
R
3
P33
*
R
0
P30
*
R
2
P32
*
R
1
P31
*
R
State of port 3 pins
Note: * Determined by the state of pins P3
5
to P3
0
.
Bit
Initial value
Read/Write
:
:
: