Datasheet

Appendix B Internal I/O Registers
Rev.6.00 Sep. 27, 2007 Page 1135 of 1268
REJ09B0220-0600
MDCR—Mode Control Register H'FF3B MCU
7
—
1
—
6
—
0
—
5
—
0
—
4
—
0
—
3
—
0
—
0
MDS0
—*
R
2
MDS2
—*
R
1
MDS1
—*
R
Current mode pin operating mode
Bit
Initial value
Read/Write
:
:
:
Note: * Determined by pins MD
2
to MD
0
MSTPCRH — Module Stop Control Register H H'FF3C Power-Down State
MSTPCRL — Module Stop Control Register L H'FF3D Power-Down State
15
0
R/W
14
0
R/W
13
1
R/W
12
1
R/W
11
1
R/W
10
1
R/W
9
1
R/W
8
1
R/W
7
1
R/W
6
1
R/W
5
1
R/W
4
1
R/W
3
1
R/W
2
1
R/W
1
1
R/W
0
1
R/W
MSTPCRH MSTPCRL
Specifies module stop mode
0
1
Module stop mode cleared
Module stop mode set
Bit
Initial value
Read/Write
:
:
:
MSTP Bits and On-Chip Supporting Modules
Register
MSTPCRH
MSTPCRL
Bits
MSTP15
MSTP14
MSTP13
MSTP12
MSTP11
MSTP10
MSTP9
MSTP8
MSTP7
MSTP6
MSTP5
MSTP4
MSTP3
MSTP2
MSTP1
MSTP0
Module
DMAC
*
DTC
TPU
8-bit timer
PPG
D/A
A/D
—
SCI2
SCI1
SCI0
—
—
—
—
—
Note: * Reserved bit in the H8S/2321.