Datasheet

Appendix B Internal I/O Registers
Rev.6.00 Sep. 27, 2007 Page 1116 of 1268
REJ09B0220-0600
MAR1AH—Memory Address Register 1AH H'FEF0 DMAC
(Not supported in H8S/2321)
MAR1AL—Memory Address Register 1AL H'FEF2 DMAC
(Not supported in H8S/2321)
16
*
R/W
18
*
R/W
17
*
R/W
19
*
R/W
21
*
R/W
22
*
R/W
23
*
R/W
24
—
0
—
25
—
0
—
26
—
0
—
27
—
0
—
28
—
0
—
29
—
0
—
30
—
0
—
31
—
0
—
0
*
R/W
2
*
R/W
1
*
R/W
3
*
R/W
4
*
R/W
5
*
R/W
6
*
R/W
7
*
R/W
8
*
R/W
9
*
R/W
10
*
R/W
11
*
R/W
12
*
R/W
13
*
R/W
14
*
R/W
15
*
R/W
20
*
R/W
* : Undefined
In short address mode: Specifies transfer source/transfer destination address
In full address mode: Specifies transfer source address
Bit
MAR1AH
Initial value
Read/Write
:
:
:
:
Bit
MAR1AL
Initial value
Read/Write
:
:
:
:
IOAR1A—I/O Address Register 1A H'FEF4 DMAC
(Not supported in H8S/2321)
0
*
R/W
2
*
R/W
1
*
R/W
3
*
R/W
4
*
R/W
5
*
R/W
6
*
R/W
7
*
R/W
8
*
R/W
9
*
R/W
10
*
R/W
11
*
R/W
12
*
R/W
13
*
R/W
14
*
R/W
15
*
R/W
* : Undefined
In short address mode: Specifies transfer source/transfer destination address
In full address mode: Not used
Bit
IOAR1A
Initial value
Read/Write
:
:
:
: