Datasheet

Appendix B Internal I/O Registers
Rev.6.00 Sep. 27, 2007 Page 1115 of 1268
REJ09B0220-0600
IOAR0B—I/O Address Register 0B H'FEEC DMAC
(Not supported in H8S/2321)
0
*
R/W
2
*
R/W
1
*
R/W
3
*
R/W
4
*
R/W
5
*
R/W
6
*
R/W
7
*
R/W
8
*
R/W
9
*
R/W
10
*
R/W
11
*
R/W
12
*
R/W
13
*
R/W
14
*
R/W
15
*
R/W
* : Undefined
In short address mode: Specifies transfer source/transfer destination address
In full address mode: Not used
Bit
IOAR0B
Initial value
Read/Write
:
:
:
:
ETCR0B—Transfer Count Register 0B H'FEEE DMAC
(Not supported in H8S/2321)
0
*
R/W
2
*
R/W
1
*
R/W
3
*
R/W
4
*
R/W
5
*
R/W
6
*
R/W
7
*
R/W
8
*
R/W
9
*
R/W
10
*
R/W
11
*
R/W
12
*
R/W
13
*
R/W
14
*
R/W
15
*
R/W
* : Undefined
Transfer counter
Sequential
mode and
idle mode
Repeat mode
Block transfer
mode
Transfer number storage register Transfer counter
Block transfer counter
Note: Not used in normal mode.
Bit
ETCR0B
Initial value
Read/Write
:
:
:
: