Datasheet

Appendix B Internal I/O Registers
Rev.6.00 Sep. 27, 2007 Page 1088 of 1268
REJ09B0220-0600
TMDR4—Timer Mode Register 4 H'FE91 TPU4
0
1
Normal operation
Reserved
PWM mode 1
PWM mode 2
Phase counting mode 1
Phase counting mode 2
Phase counting mode 3
Phase counting mode 4
—
Mode
0
1
*
0
1
0
1
*
0
1
0
1
0
1
0
1
*
Note:
* : Don’t care
7
—
1
—
6
—
1
—
5
—
0
—
4
—
0
—
3
MD3
0
R/W
0
MD0
0
R/W
2
MD2
0
R/W
1
MD1
0
R/W
Bit
Initial value
Read/Write
:
:
:
MD3 is a reserved bit. In a write, it
should always be written with 0.