Datasheet

Appendix B Internal I/O Registers
Rev.6.00 Sep. 27, 2007 Page 1064 of 1268
REJ09B0220-0600
Address
Register
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Module
Name
Data
Bus
Width
H'FFD0 TCR0 CCLR2 CCLR1 CCLR0 CKEG1 CKEG0 TPSC2 TPSC1 TPSC0 TPU0 16 bits
H'FFD1 TMDR0 BFB BFA MD3 MD2 MD1 MD0
H'FFD2 TIOR0H IOB3 IOB2 IOB1 IOB0 IOA3 IOA2 IOA1 IOA0
H'FFD3 TIOR0L IOD3 IOD2 IOD1 IOD0 IOC3 IOC2 IOC1 IOC0
H'FFD4 TIER0 TTGE TCIEV TGIED TGIEC TGIEB TGIEA
H'FFD5 TSR0 TCFV TGFD TGFC TGFB TGFA
H'FFD6 TCNT0
H'FFD7
H'FFD8 TGR0A
H'FFD9
H'FFDA TGR0B
H'FFDB
H'FFDC TGR0C
H'FFDD
H'FFDE TGR0D
H'FFDF
H'FFE0 TCR1 CCLR1 CCLR0 CKEG1 CKEG0 TPSC2 TPSC1 TPSC0 TPU1 16 bits
H'FFE1 TMDR1 — — — MD3 MD2 MD1 MD0
H'FFE2 TIOR1 IOB3 IOB2 IOB1 IOB0 IOA3 IOA2 IOA1 IOA0
H'FFE4 TIER1 TTGE TCIEU TCIEV TGIEB TGIEA
H'FFE5 TSR1 TCFD — TCFU TCFV TGFB TGFA
H'FFE6 TCNT1
H'FFE7
H'FFE8 TGR1A
H'FFE9
H'FFEA TGR1B
H'FFEB
H'FFF0 TCR2 CCLR1 CCLR0 CKEG1 CKEG0 TPSC2 TPSC1 TPSC0 TPU2 16 bits
H'FFF1 TMDR2 — — — MD3 MD2 MD1 MD0
H'FFF2 TIOR2 IOB3 IOB2 IOB1 IOB0 IOA3 IOA2 IOA1 IOA0
H'FFF4 TIER2 TTGE TCIEU TCIEV TGIEB TGIEA
H'FFF5 TSR2 TCFD — TCFU TCFV TGFB TGFA
H'FFF6 TCNT2
H'FFF7
H'FFF8 TGR2A
H'FFF9
H'FFFA TGR2B
H'FFFB
Notes: 1. Located in on-chip RAM. The bus width is 32 bits when the DTC accesses this area as
register information, and 16 bits otherwise.