Datasheet

Section 9 I/O Ports
Rev.6.00 Sep. 27, 2007 Page 365 of 1268
REJ09B0220-0600
Port 2 Data Register (P2DR)
Bit : 7 6 5 4 3 2 1 0
P27DR P26DR P25DR P24DR P23DR P22DR P21DR P20DR
Initial value : 0 0 0 0 0 0 0 0
R/W : R/W R/W R/W R/W R/W R/W R/W R/W
P2DR is an 8-bit readable/writable register that stores output data for the port 2 pins (P2
7
to P2
0
).
P2DR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.
Port 2 Register (PORT2)
Bit : 7 6 5 4 3 2 1 0
P27 P26 P25 P24 P23 P22 P21 P20
Initial value : —
*
—
*
—
*
—
*
—
*
—
*
—
*
—
*
R/W : R R R R R R R R
Note: * Determined by state of pins P2
7
to P2
0
.
PORT2 is an 8-bit read-only register that shows the pin states. It cannot be written to. Writing of
output data for the port 2 pins (P2
7
to P2
0
) must always be performed on P2DR.
If a port 2 read is performed while P2DDR bits are set to 1, the P2DR values are read. If a port 2
read is performed while P2DDR bits are cleared to 0, the pin states are read.
After a reset and in hardware standby mode, PORT2 contents are determined by the pin states, as
P2DDR and P2DR are initialized. PORT2 retains its prior state in software standby mode.