Datasheet

Section 9 I/O Ports
Rev.6.00 Sep. 27, 2007 Page 364 of 1268
REJ09B0220-0600
9.3.2 Register Configuration
Table 9.4 shows the port 2 register configuration.
Table 9.4 Port 2 Registers
Name Abbreviation R/W Initial Value Address
*
Port 2 data direction register P2DDR W H'00 H'FEB1
Port 2 data register P2DR R/W H'00 H'FF61
Port 2 register PORT2 R Undefined H'FF51
Note: * Lower 16 bits of the address.
Port 2 Data Direction Register (P2DDR)
Bit : 7 6 5 4 3 2 1 0
P27DDR P26DDR P25DDR P24DDR P23DDR P22DDR P21DDR P20DDR
Initial value : 0 0 0 0 0 0 0 0
R/W : W W W W W W W W
P2DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 2. P2DDR cannot be read; if it is, an undefined value will be read.
Setting a P2DDR bit to 1 makes the corresponding port 2 pin an output pin, while clearing the bit
to 0 makes the pin an input pin.
P2DDR is initialized to H'00 by a reset, and in hardware standby mode. It retains its prior state in
software standby mode.